TESTING THE INFORMATION SYSTEM FOR MONITORING HARDWARE STATUS

This article presents an algorithm for testing an information system for monitoring the status of hardware. The purpose of this testing algorithm is to check the compliance of the system behavior with the requirements specified by the formal model, which were used in formal verification. The article discusses various methods for constructing multi-level models, new opportunities that can be extracted through a combination of functional specifications and implementation architecture specifications, limitations that have to be taken into account when organizing testing and monitoring of various hardware states. The need to create, provide and support universal and reliable algorithmic, information and software for testing the hardware monitoring information system has been established. The development and debugging of the developed software and software for the specified research purposes were presented.

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